Processing/Sampling IF(IQ) signals

[himadri117]

Signal Characteristics: The IF (I/Q) signal consists of a DC component and an AC component.

DC Component: 2.52V; AC Component: 1.72 – 2.04 V (V P-P); BW: 20Hz - 500kHz; Power: 20dB

Requirement: Now I want to digitize this signal for further processing. I prefer a sampling at 1 MSPS with ADC and then porting digital data to PC using a FPGA over SPI interface.

Problem: The problem is, the signal with DC and AC component ranges from 3.5V to -1.5V with 2.5V from DC and almost 1V from positive cycle or negative cycle of the AC signal. Now I can use a coupled capacitor to block the Dcand use the AC for processing. My choice of ADC reference voltage is almost 2V-2.5V (for good resolution usability of ADC) so the signal can be amplified. But this signal have a negative part which I think is not good for a linear behavious for the ADC, as it has no negative reference voltage level. ADC reference is from 1V-5V. Using a rectifier is not a good choice from my view.

Question: How can I digitize this signal? Also comment on my views if not correct as I have only theoretical knowledge and never worked on a practical project.

[pebe]

The problem is, the signal with DC and AC component ranges from 3.5V to -1.5V with 2.5V from DC and almost 1V from positive cycle or negative cycle of the AC signal.

I am not clear on how you get that from a 2.04Vpp (max) signal with a 2.52VDC component.

Assuming a sinusoidal signal, then the maximum signal swing will be from 1.5V to 3.54V (2.52V ± 1.02V). If the signal is a series of short duration pulses where the DC level is near the base line of the pulse, the maximum signal swing will be from 0.48V to 4.64V (2.52 ± 2.04).

In either case you could DC couple the signal to an ADC with reference levels of 0V to 5V without a capacitor and rectifier.