FET Help

[asoljazworld]

Hello all,

I am having a diffiult time understanding the below circuit. Well, I have a good understanding of the tank ciruit but there is a FET connected with a capacitor running fro drain to source that I cannot quite grasp the understanding of. If someone could please help me it would be greatly appreciated.

M

[pebe]

I am not surprised you cannot understand the circuit, because it must be one of the worst layouts I have seen. I think it would be easier to find your way through a maze.

There are conventions that should be followed in drawing circuits, see here:

http://en.wikipedia.org/wiki/Circuit_diagram

It is accepted that any circuit should show inputs at the left and outputs at the right. Circuits should also have the power supply entering at the top; if it is DC then +ve should be at the top and –ve at the bottom. If resistors are then drawn vertically, it can quickly be seen the polarity of the voltage drop across them. Personally, I draw resistors such as feeds to FET gates horizontally, indicating they pass no current.

The workings of a circuit should be fairly obvious without having to mentally or physically redraw it. Whoever drew your circuit ignored convention. He has a gate feed going through the middle of a capacitor, a 120pF tuning capacitor that is polarised, an IC that is unidentified, and two coils that have no inductance values and with an unknown coupling. The drawing is a mess.