Trouble with Electronics Circuit

[adsneap]

Hello.

As part of a project, I have been creating an electronic circuit designed to monitor temperature and output various indicators dependant upon the temperature measured by the temperature monitoring device. I have uploaded an attachment with this post showing the part of the circuit I am having trouble with.
You'll have to excuse the tidyness of the circuit. It is still in it's draft form and will be remade once I can confirm that it works as I intend it to. It is built using a piece of software called 'Livewire'. Bare in mind that this is an amateur circuit and will be built but only for the purposes of the project and will not be used to actually monitor temperature.

The first problem I have is located in the yellow box. From my understanding of SR Flip-Flops, whilst both of the inputs are high, the output will be low. If the latch is set where S is active low, the output will then be high and stay high regardless of S, until R becomes low to reset the latch. The problem I am having is when I test the circuit the initial state of the output of the latch seems to be random, but works correctly. I just wondered if either the circuit was set up incorrectly, or if this is a problem that is restricted to livewire, and will not be replicated in the real circuit?

The second problem I have is located in the white box. I am using two 4026B chips and an astable to count for how long the temperature is raised above a certain level. After 20 seconds, the latch should be set, but will reset if the temperature then returns to a satisfactory level. I've tried to accomplish this a couple of different ways, but none so far have worked. The image shows my latest attempt. Because I'm using these particular chips, I don't have access to the binary input to the 7-segment displays. Therefore I have attempted to make do by making the latch set when segment F on the left hand side 7-segment is a one, as this should be the first time when the segment lights. The problem with this one however, is that when the latch is reset, the counters are reset at the same time which seems to cause all the segments to light, and sending a one to the output, which is unintended. Note: I had to use the transistor as a not gate because a not gate doesn't correctly pick up the input voltage, presumably due to the number of gates the signal has to travel through to get to that gate. I believe I will able to use a not gate when building the circuit.

If anybody has any thoughts, I would much appreciate it. Thank you in advance!

[pebe]

Hello adsneap, and welcome.

I think your choice of 'livewire' was not ideal for viewing - there is far too much space wasted with nothing in it, resulting in components being reduced to an almost unreadable size. Also it is in .PNG format where the colours blurr if I try to use a screen magnifier - so I have been unable to identify some components. It would have been better in .GIF format. It would also have been helpful if you had labelled the various parts of the circuit so that their action could be identified more easily.

I cannot see an SR flip-flop within the yellow box. If you are referring to the two 4011 gates, then these make up a bistable which will start up in a random state. I don't know which output you want to be high at startup, but if you could let me know I can suggest something. It can probably be arranged by slowing down one of the gate inputs with a small cap, or a cap and a resistor.

In the white box, the inputs to the AND gate, IC4b(?) are not shown so it is not possible to work out what is happening. The resetting action produced by IC12 is not synchronised with the oscillator around IC5a, so that may be something to do with it. If you could draw a simple block diagram showing the interaction of the ICs in that area then it would help a lot.

[adsneap]

I apologise for the poor image posting, it was my first time posting to any website forum's such as this one. I also apologise for not replying sooner, I assumed I would receive an email if somebody posted on this topic.

That aside, I have worked on the circuit used a d-type latches instead of a bistable latches. This has helped with the situation. I'm pretty sure you hit the nail on the head with the starting up in a random state. The first bi-stable, as you correctly assumed to be the two 4011 gates, should output a high when the input is high. The bistable is active low however, hence the not gate. When the circuit starts, the logic system 'sorts itself out' and as the signals travel through the circuit the input to the bistable changes, whilst the reset is always high. Therefore the bistable outputs a high until it is reset, which ideally wouldn't occur but I can work around it, unless you can suggest anything?

I solved the problem with the white box by using a more traditional route of counting by using separate chips to count and decode, and this now works as intended. I will upload my block diagram of the full project.

[pebe]

I apologise for the poor image posting, it was my first time posting to any website forum's such as this one. I also apologise for not replying sooner, I assumed I would receive an email if somebody posted on this topic.

Hi adsneap. No problem. You can get email notifications of replies to your postings, like this:
Go to your User Control Panel.
Select “Board Preferences”.
Select “Edit posting defaults”
Tick the ‘Yes’ box for “Notify me upon replies by default”.

In fact, you may want to tick the 'yes' boxes of all the 'edit' selections, except the one about hiding your presence.

Enjoy